From 80c42c7e45dd1f9b22a7202d422c5cd46235fe4e Mon Sep 17 00:00:00 2001 From: Stefan Junker Date: Fri, 23 Oct 2015 01:26:53 +0200 Subject: [PATCH] *: add config --- .gitignore | 2 + configuration/common/pkg/default.nix | 34 + configuration/common/pkg/neovim.nix | 196 ++ configuration/common/pkg/vim.nix | 76 + configuration/common/user/root.nix | 13 + configuration/steveej-laptop/boot.nix | 17 + .../steveej-laptop/configuration.nix | 15 + configuration/steveej-laptop/hw.nix | 60 + configuration/steveej-laptop/pkg.nix | 103 + configuration/steveej-laptop/system.nix | 140 ++ configuration/steveej-laptop/user.nix | 23 + .../steveej-utilitepro/configuration.nix | 276 +++ .../hardware-configuration.nix | 27 + .../utilitepro-kernel-dts-Makefile.patch | 13 + .../patches/utilitepro-kernel-dts.patch | 1920 +++++++++++++++++ derivations/dev/cross.nix | 89 + derivations/dev/go.nix | 39 + derivations/dev/rkt.nix | 43 + derivations/pkgs/nomad/default.nix | 29 + ops/nano/configuration.nix | 65 + ops/nano/hardware-configuration.nix | 23 + ops/nanos@kn.nix | 26 + 22 files changed, 3229 insertions(+) create mode 100644 .gitignore create mode 100644 configuration/common/pkg/default.nix create mode 100644 configuration/common/pkg/neovim.nix create mode 100644 configuration/common/pkg/vim.nix create mode 100644 configuration/common/user/root.nix create mode 100644 configuration/steveej-laptop/boot.nix create mode 100644 configuration/steveej-laptop/configuration.nix create mode 100644 configuration/steveej-laptop/hw.nix create mode 100644 configuration/steveej-laptop/pkg.nix create mode 100644 configuration/steveej-laptop/system.nix create mode 100644 configuration/steveej-laptop/user.nix create mode 100644 configuration/steveej-utilitepro/configuration.nix create mode 100644 configuration/steveej-utilitepro/hardware-configuration.nix create mode 100644 configuration/steveej-utilitepro/patches/utilitepro-kernel-dts-Makefile.patch create mode 100644 configuration/steveej-utilitepro/patches/utilitepro-kernel-dts.patch create mode 100644 derivations/dev/cross.nix create mode 100644 derivations/dev/go.nix create mode 100644 derivations/dev/rkt.nix create mode 100644 derivations/pkgs/nomad/default.nix create mode 100644 ops/nano/configuration.nix create mode 100644 ops/nano/hardware-configuration.nix create mode 100644 ops/nanos@kn.nix diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..4cc9af5 --- /dev/null +++ b/.gitignore @@ -0,0 +1,2 @@ +*.swp +result diff --git a/configuration/common/pkg/default.nix b/configuration/common/pkg/default.nix new file mode 100644 index 0000000..062f395 --- /dev/null +++ b/configuration/common/pkg/default.nix @@ -0,0 +1,34 @@ +{ config, pkgs, ... }: + +{ + # Package configuration + environment.systemPackages = with pkgs; [ + nix-repl + ( busybox.override { + extraConfig = '' + CONFIG_STATIC y + CONFIG_INSTALL_APPLET_DONT y + CONFIG_INSTALL_APPLET_SYMLINKS n + ''; + }) + + elfutils + file + tree + pwgen + proot + + parted + pv + tmux + wget + curl + + git + pastebinit + gist + + usbutils + pciutils + ]; +} diff --git a/configuration/common/pkg/neovim.nix b/configuration/common/pkg/neovim.nix new file mode 100644 index 0000000..c362c5e --- /dev/null +++ b/configuration/common/pkg/neovim.nix @@ -0,0 +1,196 @@ +{ config, pkgs, ... }: +let + commonPkgs = with pkgs; [ + neovim + ]; + goPkgs = with pkgs.goPackages; [ + go + tools.bin + godef.bin + godep.bin + ]; + pythonPkgs = with pkgs.python2Packages; [ + blockdiag + seqdiag + actdiag + nwdiag + #packetdiag + #rackdiag + ]; + +in { + nixpkgs.config.packageOverrides = pkgs: { + neovim = pkgs.neovim.override { + vimAlias = true; + configure = { + # add custom .vimrc lines like this: + customRC = '' + set nocompatible + + " leader + let mapleader = ',' + + set hidden + syntax on + set hlsearch + set number + + " mappings to stop insert mode + imap jjj + imap kkk + imap lll + imap hhh + set scroll=11 + + noremap :tabn + noremap :tabp + let g:ctrlp_map = '' + set wildignore+=*/site/*,*.so,*.swp,*.zip + let g:ctrlp_custom_ignore = { + \ 'dir': '\v[\/]\.(git|hg|svn|)$$', + \ 'file': '\v\.(exe|so|dll)$$', + \ } + + "let g:ctrlp_match_func = { 'match': 'pymatcher#PyMatch' } + "let g:pydiction_location = '~/.vim/bundle/pydiction/complete-dict' + + " allways show status line + set ls=2 + set tabstop=4 + set shiftwidth=4 + set softtabstop=4 + set expandtab + "set textwidth=80 + + " GoDef mappings + au FileType go nmap gds (go-def-split) + au FileType go nmap gdv (go-def-vertical) + au FileType go nmap gdt (go-def-tab) + + let g:tagbar_type_go = { + \ 'ctagstype' : 'go', + \ 'kinds' : [ + \ 'p:package', + \ 'i:imports:1', + \ 'c:constants', + \ 'v:variables', + \ 't:types', + \ 'n:interfaces', + \ 'w:fields', + \ 'e:embedded', + \ 'm:methods', + \ 'r:constructor', + \ 'f:functions' + \ ], + \ 'sro' : '.', + \ 'kind2scope' : { + \ 't' : 'ctype', + \ 'n' : 'ntype' + \ }, + \ 'scope2kind' : { + \ 'ctype' : 't', + \ 'ntype' : 'n' + \ }, + \ 'ctagsbin' : 'gotags', + \ 'ctagsargs' : '-sort -silent' + \ } + + + " syntastic + au FileType qf setlocal wrap linebreak + let g:syntastic_always_populate_loc_list = 1 + let g:syntastic_auto_loc_list = 0 + let g:syntastic_check_on_open = 1 + let g:syntastic_check_on_wq = 0 + if has("gui_running") + set mouse=a + else + set mouse= + endif + + set wildignore+=*/site/*,*.so,*.swp,*.zip + let g:ctrlp_custom_ignore = { + \ 'dir': '\v[\/]\.(git|hg|svn|)$$', + \ 'file': '\v\.(exe|so|dll)$$', + \ } + + let g:go_fmt_command = "goimports" + + "au BufRead,BufNewFile *.txt,*.md,*.markdown setlocal spell spelllang=de_de,en_us + + " sync default register to clipboard + if has('unnamedplus') + set clipboard=unnamedplus + else + set clipboard=unnamed + endif + + let g:rbpt_colorpairs = [ + \ ['brown', 'RoyalBlue3'], + \ ['Darkblue', 'SeaGreen3'], + \ ['darkgray', 'DarkOrchid3'], + \ ['darkgreen', 'firebrick3'], + \ ['darkcyan', 'RoyalBlue3'], + \ ['darkred', 'SeaGreen3'], + \ ['darkmagenta', 'DarkOrchid3'], + \ ['brown', 'firebrick3'], + \ ['gray', 'RoyalBlue3'], + \ ['black', 'SeaGreen3'], + \ ['darkmagenta', 'DarkOrchid3'], + \ ['Darkblue', 'firebrick3'], + \ ['darkgreen', 'RoyalBlue3'], + \ ['darkcyan', 'SeaGreen3'], + \ ['darkred', 'DarkOrchid3'], + \ ['red', 'firebrick3'], + \ ] + let g:rbpt_max = 16 + let g:rbpt_loadcmd_toggle = 0 + + au VimEnter * RainbowParenthesesToggle + au Syntax * RainbowParenthesesLoadRound + au Syntax * RainbowParenthesesLoadSquare + au Syntax * RainbowParenthesesLoadBraces + + set t_ut= + colorscheme PaperColor + + " Python {{{ + augroup ft_python + au! + au FileType python setlocal omnifunc=pythoncomplete#Complete + au FileType python setlocal define=^\s*\\(def\\\\|class\\) + augroup END + " }}} + ''; + +# vam.knownPlugins = pkgs.vimPlugins; # optional + vam.pluginDictionaries = [ # full ducomentation at github.com/MarcWeber/vim-addon-manager + "vim-addon-vim2nix" + "youcompleteme" + "vim-airline" + "vim-addon-nix" + "ctrlp" + "vim-go" + "syntastic" + "tagbar" + "vim-css-color" + "rainbow_parentheses" + "vim-colorschemes" + "vim-colorstepper" + "gitgutter" + "vim-pandoc" + "vim-pandoc-syntax" + "vim-pandoc-after" + "vimpreviewpandoc" + ]; + }; + extraPythonPackages = with pkgs.python2Packages; [ + pandocfilters + htmltreediff + html5lib + ] ++ pythonPkgs; + withPython3 = false; + }; + }; + environment.systemPackages = commonPkgs ++ goPkgs ++ pythonPkgs; +} diff --git a/configuration/common/pkg/vim.nix b/configuration/common/pkg/vim.nix new file mode 100644 index 0000000..ab24cee --- /dev/null +++ b/configuration/common/pkg/vim.nix @@ -0,0 +1,76 @@ +{ config, pkgs, ... }: + +{ + environment.systemPackages = with pkgs; [ + (vim_configurable.customize { + name = "vim"; + + # add custom .vimrc lines like this: + vimrcConfig.customRC = '' + set hidden + syntax on +" set hlsearch + set number + + + " mappings to stop insert mode + imap jjj + imap kkk + imap lll + imap hhh + set scroll=11 + + noremap :tabn + noremap :tabp + let g:ctrlp_map = '' + set wildignore+=*/site/*,*.so,*.swp,*.zip + let g:ctrlp_custom_ignore = { + \ 'dir': '\v[\/]\.(git|hg|svn|)$$', + \ 'file': '\v\.(exe|so|dll)$$', + \ } + + let g:pydiction_location = '~/.vim/bundle/pydiction/complete-dict' + + set ls=2 " allways show status line + set tabstop=4 + set shiftwidth=4 + set softtabstop=4 + set expandtab + "set textwidth=80 + + " GoDef mappings + au FileType go nmap gds (go-def-split) + au FileType go nmap gdv (go-def-vertical) + au FileType go nmap gdt (go-def-tab) + + " syntastic +" au FileType qf setlocal wrap linebreak +" let g:syntastic_always_populate_loc_list = 1 +" let g:syntastic_auto_loc_list = 0 +" let g:syntastic_check_on_open = 1 +" let g:syntastic_check_on_wq = 0 + ''; + + vimrcConfig.vam.knownPlugins = pkgs.vimPlugins; # optional + vimrcConfig.vam.pluginDictionaries = [{ + # full ducomentation at github.com/MarcWeber/vim-addon-manager + names = [ + "youcompleteme" + "vim-airline" + "vim-addon-nix" + "ctrlp" + "vim-go" + "vim-colorschemes" +# "syntastic" + # "ag.vim" + # "gosu-colors" + # "tagbar" + # "molokai" + ]; + } + + ]; + }) + python + ]; +} diff --git a/configuration/common/user/root.nix b/configuration/common/user/root.nix new file mode 100644 index 0000000..b05133a --- /dev/null +++ b/configuration/common/user/root.nix @@ -0,0 +1,13 @@ +# Edit this configuration file to define what should be installed on +# your system. Help is available in the configuration.nix(5) man page +# and in the NixOS manual (accessible by running ‘nixos-help’). + +{ config, pkgs, ... }: +{ + users.mutableUsers = false; + + users.extraUsers.root = { + hashedPassword = "removed"; + openssh.authorizedKeys.keys = ["ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQD3niN5KcIYikRhXTYZCSehI1ZQs+vvG/dZ7KxNVHslfsS+p1yTycXcZFtDDn5vtG2fAo3yksxCk+G10/AWQ+NMOcFKuAi5qTOYSLbEcHVlZ4ko8sDUe3fF79vrCqY7IWbKKjZ4DH77Qs6SXk5GIlNaIzxut8Dpv8qHnkPiPuFgrJC4oGk60ZKmCPvOEpgg9twcdI6ykIxD4Fg+hHgG1p07uSEcm9EADli8RsU3UJ1UBhXMohMC6HrKVBkBX9wTo+zY+xqXxxem6xGNnkNiZLACfhCnjXv39zh85pgFuNv7R8SzVZQ9iRoCmax/w3JtWdDjqoTGgLfJyhMMjNdjVHOx steveej@steveej-laptop"]; + }; +} diff --git a/configuration/steveej-laptop/boot.nix b/configuration/steveej-laptop/boot.nix new file mode 100644 index 0000000..04adcd4 --- /dev/null +++ b/configuration/steveej-laptop/boot.nix @@ -0,0 +1,17 @@ +{ config, lib, pkgs, ... }: + +{ + # Bootloader, initrd and Kernel + boot.loader.grub.enable = true; + boot.loader.grub.enableCryptodisk = true; + boot.loader.grub.version = 2; + + # Workaround for nm-pptp + boot.kernelModules = [ + "nf_conntrack_proto_gre" + "nf_conntrack_pptp" + ]; + + boot.kernelPackages = pkgs.linuxPackages_latest; + boot.tmpOnTmpfs = true; +} diff --git a/configuration/steveej-laptop/configuration.nix b/configuration/steveej-laptop/configuration.nix new file mode 100644 index 0000000..285594a --- /dev/null +++ b/configuration/steveej-laptop/configuration.nix @@ -0,0 +1,15 @@ +# Edit this configuration file to define what should be installed on +# your system. Help is available in the configuration.nix(5) man page +# and in the NixOS manual (accessible by running ‘nixos-help’). + +{ config, pkgs, ... }: + +{ + imports = [ + ./hw.nix + ./boot.nix + ./system.nix + ./pkg.nix + ./user.nix + ]; +} diff --git a/configuration/steveej-laptop/hw.nix b/configuration/steveej-laptop/hw.nix new file mode 100644 index 0000000..334d1d5 --- /dev/null +++ b/configuration/steveej-laptop/hw.nix @@ -0,0 +1,60 @@ +# Do not modify this file! It was generated by ‘nixos-generate-config’ +# and may be overwritten by future invocations. Please make changes +# to /etc/nixos/configuration.nix instead. +{ config, lib, pkgs, ... }: + +{ + nix.maxJobs = 2; + nix.buildCores = 4; + + hardware.enableAllFirmware = true; + + boot.initrd.availableKernelModules = [ "xhci_pci" "ehci_pci" "ahci" "usbhid" "sd_mod" ]; + boot.kernelModules = [ "kvm-intel" ]; + boot.extraModulePackages = [ ]; + + fileSystems."/" = { device = "/dev/disk/by-uuid/be9be32e-1fb0-45c3-9714-390ee2e6c184"; + fsType = "btrfs"; + options = [ + "defaults" + "compress=lzo" + "discard" + "subvol=nixos" + ]; + }; + fileSystems."/home" = { device = "/dev/disk/by-uuid/be9be32e-1fb0-45c3-9714-390ee2e6c184"; + fsType = "btrfs"; + options = [ + "defaults" + "compress=lzo" + "discard" + "subvol=home" + ]; + }; + + fileSystems."/var/lib/rkt" = { + fsType = "tmpfs"; + }; + + fileSystems."/var/lib/cni" = { + fsType = "tmpfs"; + }; + + swapDevices = [ ]; + + # Define on which hard drive you want to install Grub. + boot.loader.grub.device = "/dev/sda"; + + boot.initrd.luks.devices = [ { +# name = "luksSSD2"; +# device = "/dev/disk/by-partuuid/bbcb4838-1f05-4c1a-b014-947d2e536b14"; +# preLVM = true; +# allowDiscards = true; +# } { + name = "luksSSD1"; + device = "/dev/disk/by-uuid/2274dc28-7a48-4355-bc27-2d73f7a2744e"; + preLVM = false; + allowDiscards = true; + } + ]; +} diff --git a/configuration/steveej-laptop/pkg.nix b/configuration/steveej-laptop/pkg.nix new file mode 100644 index 0000000..8778c6b --- /dev/null +++ b/configuration/steveej-laptop/pkg.nix @@ -0,0 +1,103 @@ +{ config, pkgs, ... }: + +{ + nixpkgs.config = { + allowBroken = false; + + packageOverrides = pkgs: rec { + goPackages = pkgs.go16Packages; + + bluez = pkgs.bluez5; + + #vimPlugins = pkgs.recurseIntoAttrs (pkgs.callPackage /home/steveej/src/github/NixOS/nixpkgs-systemsource/pkgs/misc/vim-plugins { }); + + linuxPackages = pkgs.linuxPackages_latest; + + #pythonFull = pkgs.python27.buildEnv.override { + # extraLibs = with pkgs.pythonPackages; []; + #}; + + }; + + allowUnfree = true; + + chromium = { + enablePepperFlash = true; + enablePepperPDF = true; + }; + + firefox = { + enableGoogleTalkPlugin = true; + enableAdobeFlash = false; + }; + + pidgin = { + openssl = true; + gnutls = true; + }; + +# TODO: implement support for this +# libvirt = { +# xenSupport = false; +# }; + + }; + + imports = + [ + ../common/pkg/default.nix + ../common/pkg/neovim.nix + ]; + + + environment.systemPackages = with pkgs; [ + androidsdk_4_4 + + nixops + ansible + + gnupg + picocom + xfce.terminal + xorg.xbacklight + coreutils + lsof + + xscreensaver + firefox-wrapper + chromium + + qpdfview + thunderbird + pidgin + hexchat + skype + + x2goclient + remmina + teamviewer + gnome3.dconf # needed by virtmanager + virtmanager + linuxPackages.virtualbox + x11_ssh_askpass + + spotify + vlc + audacity + pavucontrol + + gimp + inkscape + pdftk + + rkt + + iptables + nftables + iperf + + pandoc + pythonFull + ]; + +} diff --git a/configuration/steveej-laptop/system.nix b/configuration/steveej-laptop/system.nix new file mode 100644 index 0000000..b26d5c2 --- /dev/null +++ b/configuration/steveej-laptop/system.nix @@ -0,0 +1,140 @@ +{ config, lib, pkgs, ... }: + +{ + nix.binaryCachePublicKeys = [ "hydra.nixos.org-1:CNHJZBh9K4tP3EKF6FkkgeVYsS3ohTl+oS0Qa8bezVs=" ]; + nix.binaryCaches = [ + "https://cache.nixos.org" + "http://hydra.nixos.org" + ]; + nix.trustedBinaryCaches = [ + "https://cache.nixos.org" + "http://hydra.nixos.org" + ]; + + # The NixOS release to be compatible with for stateful data such as databases. + # system.stateVersion = "unstable"; + networking.hostName = "steveej-laptop"; # Define your hostname. + + networking.firewall.enable = false; + networking.networkmanager = { + enable = true; + unmanaged = [ + "interface-name:veth*" + "interface-name:virbr*" + "interface-name:br*" + "interface-name:*vbox*" + "interface-name:*cni*" + ]; + }; + + programs.bash = { + enableCompletion = true; + promptInit = '' + if test "$TERM" != "dumb"; then + # Provide a nice prompt. + BLUE="\[\033[0;34m\]" + RED="\[\033[1;31m\]" + GREEN="\[\033[1;32m\]" + NO_COLOR="\[\033[0m\]" + + PROMPT_COLOR=$RED + let $UID && PROMPT_COLOR=$GREEN + PS1=" $BLUE\W/ $PROMPT_COLOR\\$ $NO_COLOR" + if test "$TERM" = "xterm"; then + PS1="\[\033]2;\h:\u:\w\007\]$PS1" + fi + fi + ''; + }; + + # Package configuration + environment.systemPackages = with pkgs; [ + xorg.xmodmap + ]; + + environment.sessionVariables = { + EDITOR = "vim"; + NIXPKGS_ALLOW_UNFREE = "1"; + + # Don't create .pyc files. + PYTHONDONTWRITEBYTECODE = "1"; + }; + + environment.etc."lvm/lvm.conf".text = '' + devices { + issue_discards = 1 + } + ''; + + # Fonts, I18N, Date ... + fonts = { + enableCoreFonts = true; + }; + + i18n = { + consoleFont = "lat9w-16"; + defaultLocale = "en_US.UTF-8"; + }; + time.timeZone = "Europe/Berlin"; + + # Services + services.gpm.enable = true; + services.openssh.enable = true; + services.openssh.permitRootLogin = "yes"; + + services.teamviewer.enable = true; + + services.printing.enable = true; # uses cups + services.xserver = { + synaptics.enable = true; + videoDrivers = [ "qxl" "intel" ]; + enable = true; + layout = "us"; + + windowManager.qtile.enable = true; + windowManager.default = "qtile"; + desktopManager = { + xterm.enable = false; + xfce.enable = true; + }; + + displayManager = { + slim = { + enable = true; + theme = /home/steveej/src/github/steveej/nixos-slim-theme; +# theme = pkgs.fetchurl { +# url = "mirror://sourceforge/project/slim.berlios/slim-rear-window.tar.gz"; +# sha256 = "04cmwdgcvxd3srhwcnqmmfdj0avkql7570y14vv98zmnrh33f4hb"; +# }; +# autoLogin = { +# enable = true; +# user = "steveej"; +# delay = 0; +# }; + }; + sessionCommands = '' + xscreensaver -no-splash & + ${pkgs.networkmanagerapplet}/bin/nm-applet & + $(sleep 2; xmodmap /home/steveej/.Xmodmap) & + ''; + }; + }; + + services.udev.extraRules = '' + # OnePlusOne + ATTR{idVendor}=="05c6", ATTR{idProduct}=="6764", SYMLINK+="libmtp-%k", MODE="660", GROUP="audio", ENV{ID_MTP_DEVICE}="1", ENV{ID_MEDIA_PLAYER}="1", TAG+="uaccess" + ATTR{idVendor}=="05c6", ATTR{idProduct}=="6765", SYMLINK+="libmtp-%k", MODE="660", GROUP="audio", ENV{ID_MTP_DEVICE}="1", ENV{ID_MEDIA_PLAYER}="1", TAG+="uaccess" + ''; + + hardware = { + bluetooth.enable = true; + pulseaudio = { + enable = true; + package = pkgs.pulseaudioFull; + support32Bit = true; + }; + }; + + virtualisation.libvirtd.enable = true; + virtualisation.virtualbox.host.enable = true; +} diff --git a/configuration/steveej-laptop/user.nix b/configuration/steveej-laptop/user.nix new file mode 100644 index 0000000..b90bd88 --- /dev/null +++ b/configuration/steveej-laptop/user.nix @@ -0,0 +1,23 @@ + +{ config, pkgs, ... }: +{ + imports = + [ + ../common/user/root.nix + ]; + + users.extraUsers.steveej = { + uid = 1000; + isNormalUser = true; + home = "/home/steveej"; + extraGroups = [ "wheel" "libvirtd" "networkmanager" ]; + hashedPassword = "removed"; + }; + users.extraUsers.steveej2 = { + uid = 1001; + isNormalUser = true; + home = "/home/steveej2"; + extraGroups = [ "wheel" "libvirtd" ]; + hashedPassword = "removed"; + }; +} diff --git a/configuration/steveej-utilitepro/configuration.nix b/configuration/steveej-utilitepro/configuration.nix new file mode 100644 index 0000000..07da317 --- /dev/null +++ b/configuration/steveej-utilitepro/configuration.nix @@ -0,0 +1,276 @@ +# Edit this configuration file to define what should be installed on +# your system. Help is available in the configuration.nix(5) man page +# and in the NixOS manual (accessible by running ‘nixos-help’). + +{ config, pkgs, ... }: + +{ + # The NixOS release to be compatible with for stateful data such as databases. + system.stateVersion = "16.03"; + nix.maxJobs = 4; + nix.buildCores = 4; + + nix.extraOptions = '' + gc-keep-outputs = true + gc-keep-derivations = true + ''; + + + + nixpkgs.config = { + + packageOverrides = super: let self = super.pkgs; in { + linux_4_1 = super.linux_4_1.override { + kernelPatches = super.linux_4_1.kernelPatches ++ [ + { patch = ./patches/utilitepro-kernel-dts.patch; name = "utilitepro-dts"; } + { patch = ./patches/utilitepro-kernel-dts-Makefile.patch; name = "utilitepro-dts-Makefile"; } + ]; + # add "CONFIG_PPP_FILTER y" option to the set of kernel options + extraConfig = '' + BTRFS_FS y + BTRFS_FS_POSIX_ACL y + FUSE_FS y + OVERLAY_FS y + + BLK_DEV_DM y + DM_THIN_PROVISIONING y + + NAMESPACES y + NET_NS y + PID_NS y + IPC_NS y + UTS_NS y + DEVPTS_MULTIPLE_INSTANCES y + CGROUPS y + CGROUP_CPUACCT y + CGROUP_DEVICE y + CGROUP_FREEZER y + CGROUP_SCHED y + CPUSETS y + MEMCG y + POSIX_MQUEUE y + + MACVLAN m + VETH m + BRIDGE m + + NF_TABLES m + NETFILTER y + NETFILTER_ADVANCED y + NF_NAT_IPV4 m + IP_NF_FILTER m + IP_NF_TARGET_MASQUERADE m + NETFILTER_XT_MATCH_ADDRTYPE m + NETFILTER_XT_MATCH_CONNTRACK m + NF_NAT m + NF_NAT_NEEDED m + BRIDGE_NETFILTER m + NETFILTER_INGRESS y + NETFILTER_NETLINK m + NETFILTER_NETLINK_ACCT m + NETFILTER_NETLINK_QUEUE m + NETFILTER_NETLINK_LOG m + NETFILTER_SYNPROXY m + NETFILTER_XTABLES m + NETFILTER_XT_MARK m + NETFILTER_XT_CONNMARK m + NETFILTER_XT_SET m + NETFILTER_XT_TARGET_AUDIT m + NETFILTER_XT_TARGET_CHECKSUM m + NETFILTER_XT_TARGET_CLASSIFY m + NETFILTER_XT_TARGET_CONNMARK m + NETFILTER_XT_TARGET_CONNSECMARK m + NETFILTER_XT_TARGET_CT m + NETFILTER_XT_TARGET_DSCP m + NETFILTER_XT_TARGET_HL m + NETFILTER_XT_TARGET_HMARK m + NETFILTER_XT_TARGET_IDLETIMER m + NETFILTER_XT_TARGET_LED m + NETFILTER_XT_TARGET_LOG m + NETFILTER_XT_TARGET_MARK m + NETFILTER_XT_NAT m + NETFILTER_XT_TARGET_NETMAP m + NETFILTER_XT_TARGET_NFLOG m + NETFILTER_XT_TARGET_NFQUEUE m + NETFILTER_XT_TARGET_NOTRACK m + NETFILTER_XT_TARGET_RATEEST m + NETFILTER_XT_TARGET_REDIRECT m + NETFILTER_XT_TARGET_TEE m + NETFILTER_XT_TARGET_TPROXY m + NETFILTER_XT_TARGET_TRACE m + NETFILTER_XT_TARGET_SECMARK m + NETFILTER_XT_TARGET_TCPMSS m + NETFILTER_XT_TARGET_TCPOPTSTRIP m + NETFILTER_XT_MATCH_ADDRTYPE m + NETFILTER_XT_MATCH_BPF m + NETFILTER_XT_MATCH_CGROUP m + NETFILTER_XT_MATCH_CLUSTER m + NETFILTER_XT_MATCH_COMMENT m + NETFILTER_XT_MATCH_CONNBYTES m + NETFILTER_XT_MATCH_CONNLABEL m + NETFILTER_XT_MATCH_CONNLIMIT m + NETFILTER_XT_MATCH_CONNMARK m + NETFILTER_XT_MATCH_CONNTRACK m + NETFILTER_XT_MATCH_CPU m + NETFILTER_XT_MATCH_DCCP m + NETFILTER_XT_MATCH_DEVGROUP m + NETFILTER_XT_MATCH_DSCP m + NETFILTER_XT_MATCH_ECN m + NETFILTER_XT_MATCH_ESP m + NETFILTER_XT_MATCH_HASHLIMIT m + NETFILTER_XT_MATCH_HELPER m + NETFILTER_XT_MATCH_HL m + NETFILTER_XT_MATCH_IPCOMP m + NETFILTER_XT_MATCH_IPRANGE m + NETFILTER_XT_MATCH_IPVS m + NETFILTER_XT_MATCH_L2TP m + NETFILTER_XT_MATCH_LENGTH m + NETFILTER_XT_MATCH_LIMIT m + NETFILTER_XT_MATCH_MAC m + NETFILTER_XT_MATCH_MARK m + NETFILTER_XT_MATCH_MULTIPORT m + NETFILTER_XT_MATCH_NFACCT m + NETFILTER_XT_MATCH_OSF m + NETFILTER_XT_MATCH_OWNER m + NETFILTER_XT_MATCH_POLICY m + NETFILTER_XT_MATCH_PHYSDEV m + NETFILTER_XT_MATCH_PKTTYPE m + NETFILTER_XT_MATCH_QUOTA m + NETFILTER_XT_MATCH_RATEEST m + NETFILTER_XT_MATCH_REALM m + NETFILTER_XT_MATCH_RECENT m + NETFILTER_XT_MATCH_SCTP m + NETFILTER_XT_MATCH_SOCKET m + NETFILTER_XT_MATCH_STATE m + NETFILTER_XT_MATCH_STATISTIC m + NETFILTER_XT_MATCH_STRING m + NETFILTER_XT_MATCH_TCPMSS m + NETFILTER_XT_MATCH_TIME m + NETFILTER_XT_MATCH_U32 m + + + + MEMCG_KMEM y + MEMCG_SWAP y + MEMCG_SWAP_ENABLED y + BLK_CGROUP y + IOSCHED_CFQ y + BLK_DEV_THROTTLING y + CGROUP_PERF y + CGROUP_HUGETLB y + NET_CLS_CGROUP y + CGROUP_NET_PRIO y + CFS_BANDWIDTH y + FAIR_GROUP_SCHED y + RT_GROUP_SCHED y + EXT3_FS y + EXT3_FS_XATTR y + EXT3_FS_POSIX_ACL y + EXT3_FS_SECURITY y + + PPP_FILTER y + HAVE_IMX_ANATOP y + HAVE_IMX_GPC y + HAVE_IMX_MMDC y + HAVE_IMX_SRC y + SOC_IMX6 y + SOC_IMX6Q y + SOC_IMX6SL y + PCI_IMX6 y + ARM_IMX6Q_CPUFREQ y + IMX_WEIM y + AHCI_IMX y + SERIAL_IMX y + SERIAL_IMX_CONSOLE y + I2C_IMX y + SPI_IMX y + PINCTRL_IMX y + PINCTRL_IMX6Q y + PINCTRL_IMX6SL y + POWER_RESET_IMX y + IMX_THERMAL y + IMX2_WDT y + IMX_IPUV3_CORE y + DRM_IMX y + DRM_IMX_FB_HELPER y + DRM_IMX_PARALLEL_DISPLAY y + DRM_IMX_TVE y + DRM_IMX_LDB y + DRM_IMX_IPUV3 y + DRM_IMX_HDMI y + MMC_SDHCI_ESDHC_IMX y + IMX_SDMA y + PWM_IMX y + DEBUG_IMX6Q_UART y + + ''; + }; +# pkgs.linux_4_2 = "/nix/store/jc1h6mcc6sq420q2i572qba4b0xzw4gm-linux-4.3-armv7l-unknown-linux-gnueabi"; + }; + allowUnfree = true; + }; + + imports = + [ # Include the results of the hardware scan. + ./hardware-configuration.nix + ]; + + networking.hostName = "steveej-utilitepro"; # Define your hostname. +#networking.wireless.enable = true; # Enables wireless support viawpa_supplicant. + + boot.kernelPackages = pkgs.linuxPackages_4_1; + boot.extraKernelParams = [ + "cm_fx6_v4l_msize=128M" + "vmalloc=256M" + "root=/dev/sda3" + "rootflags=subvol=nixos" + "console=ttymxc3,115200" + ]; + + boot.loader.generic-extlinux-compatible.enable = true; + boot.loader.grub.enable = false; + + # Select internationalisation properties. + i18n = { + consoleFont = "Lat2-Terminus16"; + consoleKeyMap = "us"; + defaultLocale = "en_US.UTF-8"; + }; + + # Set your time zone. + time.timeZone = "Europe/Amsterdam"; + + # List packages installed in system profile. To search by name, run: + environment.systemPackages = with pkgs; [ + iptables + wget + vim + sshfsFuse + pastebinit + git + ]; + + # Enable the OpenSSH daemon. + services.openssh.enable = true; + services.openssh.permitRootLogin = "yes"; + + # Disable CUPS to print documents. + services.printing.enable = false; + + users.mutableUsers = false; + users.extraUsers.root = { + hashedPassword = "removed"; + openssh.authorizedKeys.keys = ["ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQD3niN5KcIYikRhXTYZCSehI1ZQs+vvG/dZ7KxNVHslfsS+p1yTycXcZFtDDn5vtG2fAo3yksxCk+G10/AWQ+NMOcFKuAi5qTOYSLbEcHVlZ4ko8sDUe3fF79vrCqY7IWbKKjZ4DH77Qs6SXk5GIlNaIzxut8Dpv8qHnkPiPuFgrJC4oGk60ZKmCPvOEpgg9twcdI6ykIxD4Fg+hHgG1p07uSEcm9EADli8RsU3UJ1UBhXMohMC6HrKVBkBX9wTo+zY+xqXxxem6xGNnkNiZLACfhCnjXv39zh85pgFuNv7R8SzVZQ9iRoCmax/w3JtWdDjqoTGgLfJyhMMjNdjVHOx steveej@steveej-laptop"]; + }; + users.extraUsers.steveej = { + uid = 1000; + isNormalUser = true; + home = "/home/steveej"; + extraGroups = [ "wheel" "libvirtd" ]; + hashedPassword = "removed"; + openssh.authorizedKeys.keys = ["ssh-rsa AAAAB3NzaC1yc2EAAAADAQABAAABAQD3niN5KcIYikRhXTYZCSehI1ZQs+vvG/dZ7KxNVHslfsS+p1yTycXcZFtDDn5vtG2fAo3yksxCk+G10/AWQ+NMOcFKuAi5qTOYSLbEcHVlZ4ko8sDUe3fF79vrCqY7IWbKKjZ4DH77Qs6SXk5GIlNaIzxut8Dpv8qHnkPiPuFgrJC4oGk60ZKmCPvOEpgg9twcdI6ykIxD4Fg+hHgG1p07uSEcm9EADli8RsU3UJ1UBhXMohMC6HrKVBkBX9wTo+zY+xqXxxem6xGNnkNiZLACfhCnjXv39zh85pgFuNv7R8SzVZQ9iRoCmax/w3JtWdDjqoTGgLfJyhMMjNdjVHOx steveej@steveej-laptop"]; + }; + + networking.firewall.enable = false; + networking.useNetworkd = true; +} diff --git a/configuration/steveej-utilitepro/hardware-configuration.nix b/configuration/steveej-utilitepro/hardware-configuration.nix new file mode 100644 index 0000000..e5eecc9 --- /dev/null +++ b/configuration/steveej-utilitepro/hardware-configuration.nix @@ -0,0 +1,27 @@ +# Do not modify this file! It was generated by ‘nixos-generate-config’ +# and may be overwritten by future invocations. Please make changes +# to /etc/nixos/configuration.nix instead. +{ config, lib, pkgs, ... }: + +{ + imports = + [ + ]; + + boot.initrd.availableKernelModules = [ ]; + boot.kernelModules = [ ]; + boot.extraModulePackages = [ ]; + + hardware.enableAllFirmware = true; + + fileSystems."/" = + { device = "/dev/disk/by-uuid/09d1e4a2-d57b-4de8-a42b-671c4c188367"; + fsType = "btrfs"; + options = "subvol=nixos"; + }; + fileSystems."/boot" = + { device = "/dev/disk/by-uuid/f1e7e913-93a0-4258-88f9-f65041d91d66"; + }; + + swapDevices = [ ]; +} diff --git a/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts-Makefile.patch b/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts-Makefile.patch new file mode 100644 index 0000000..3b331d4 --- /dev/null +++ b/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts-Makefile.patch @@ -0,0 +1,13 @@ +diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile +index 992736b..6ff9735 100644 +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -296,6 +296,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \ + imx6q-sabreauto.dtb \ + imx6q-sabrelite.dtb \ + imx6q-sabresd.dtb \ ++ imx6q-sbc-fx6.dtb \ ++ imx6q-sbc-fx6m.dtb \ + imx6q-sbc6x.dtb \ + imx6q-tbs2910.dtb \ + imx6q-tx6q-1010.dtb \ diff --git a/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts.patch b/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts.patch new file mode 100644 index 0000000..f6333d7 --- /dev/null +++ b/configuration/steveej-utilitepro/patches/utilitepro-kernel-dts.patch @@ -0,0 +1,1920 @@ +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts +index 99b46f8..864fb15 100644 +--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts +@@ -1,5 +1,5 @@ + /* +- * Copyright 2013 CompuLab Ltd. ++ * Copyright 2014 CompuLab Ltd. + * + * Author: Valentin Raevsky + * +@@ -12,96 +12,9 @@ + */ + + /dts-v1/; +-#include "imx6q.dtsi" ++#include "imx6q-cm-fx6.dtsi" + + / { + model = "CompuLab CM-FX6"; + compatible = "compulab,cm-fx6", "fsl,imx6q"; +- +- memory { +- reg = <0x10000000 0x80000000>; +- }; +- +- leds { +- compatible = "gpio-leds"; +- +- heartbeat-led { +- label = "Heartbeat"; +- gpios = <&gpio2 31 0>; +- linux,default-trigger = "heartbeat"; +- }; +- }; +-}; +- +-&fec { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_enet>; +- phy-mode = "rgmii"; +- status = "okay"; +-}; +- +-&gpmi { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_gpmi_nand>; +- status = "okay"; +-}; +- +-&iomuxc { +- imx6q-cm-fx6 { +- pinctrl_enet: enetgrp { +- fsl,pins = < +- MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 +- MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 +- MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 +- MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 +- MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 +- MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 +- MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 +- MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 +- MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 +- MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 +- MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 +- MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 +- MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 +- MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 +- MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 +- MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 +- >; +- }; +- +- pinctrl_gpmi_nand: gpminandgrp { +- fsl,pins = < +- MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 +- MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 +- MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 +- MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 +- MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 +- MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 +- MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 +- MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 +- MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 +- MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 +- MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 +- MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 +- MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 +- MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 +- MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 +- MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 +- MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 +- >; +- }; +- +- pinctrl_uart4: uart4grp { +- fsl,pins = < +- MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 +- MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 +- >; +- }; +- }; +-}; +- +-&uart4 { +- pinctrl-names = "default"; +- pinctrl-0 = <&pinctrl_uart4>; +- status = "okay"; + }; +diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dtsi b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +new file mode 100644 +index 0000000..b29ec1c +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-cm-fx6.dtsi +@@ -0,0 +1,506 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q.dtsi" ++ ++/ { ++ memory { ++ reg = <0x10000000 0x80000000>; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ heartbeat-led { ++ label = "Heartbeat"; ++ gpios = <&gpio2 31 0>; ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for usb otg */ ++ reg_usb_otg_vbus: usb_otg_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_otg_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio3 22 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator for usb hub1 */ ++ reg_usb_h1_vbus: usb_h1_vbus { ++ compatible = "regulator-fixed"; ++ regulator-name = "usb_h1_vbus"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ gpio = <&gpio7 8 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator1 for wifi/bt */ ++ awnh387_npoweron: regulator-awnh387-npoweron { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-npoweron"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio7 12 0>; ++ enable-active-high; ++ }; ++ ++ /* regulator2 for wifi/bt */ ++ awnh387_wifi_nreset: regulator-awnh387-wifi-nreset { ++ compatible = "regulator-fixed"; ++ regulator-name = "regulator-awnh387-wifi-nreset"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 16 0>; ++ startup-delay-us = <10000>; ++ }; ++ ++ reg_sata_phy_slp: sata_phy_slp { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_phy_slp"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 23 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ }; ++ ++ reg_sata_nrstdly: sata_nrstdly { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nrstdly"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio6 6 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_phy_slp>; ++ }; ++ ++ reg_sata_pwren: sata_pwren { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_pwren"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio1 28 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nrstdly>; ++ }; ++ ++ reg_sata_nstandby1: sata_nstandby1 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby1"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio3 20 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_pwren>; ++ }; ++ ++ reg_sata_nstandby2: sata_nstandby2 { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_nstandby2"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio5 2 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ vin-supply = <®_sata_nstandby1>; ++ }; ++ ++ reg_sata_ldo_en: sata_ldo_en { ++ compatible = "regulator-fixed"; ++ regulator-name = "cm_fx6_sata_ldo_en"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ gpio = <&gpio2 16 0>; ++ startup-delay-us = <100>; ++ enable-active-high; ++ regulator-boot-on; ++ vin-supply = <®_sata_nstandby2>; ++ }; ++ }; ++ ++ aliases { ++ mxcfb0 = &mxcfb1; ++ mxcfb1 = &mxcfb2; ++ }; ++ ++ sound-hdmi { ++ compatible = "fsl,imx6q-audio-hdmi", ++ "fsl,imx-audio-hdmi"; ++ model = "imx-audio-hdmi"; ++ hdmi-controller = <&hdmi_audio>; ++ }; ++ ++ sound-spdif { ++ compatible = "fsl,imx-audio-spdif", ++ "fsl,imx-sabreauto-spdif"; ++ model = "imx-spdif"; ++ spdif-controller = <&spdif>; ++ spdif-out; ++ spdif-in; ++ }; ++ ++ mxcfb1: fb@0 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "hdmi"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ mxcfb2: fb@1 { ++ compatible = "fsl,mxc_sdc_fb"; ++ disp_dev = "lcd"; ++ interface_pix_fmt = "RGB24"; ++ mode_str ="1920x1080M@60"; ++ default_bpp = <32>; ++ int_clk = <0>; ++ late_init = <0>; ++ status = "disabled"; ++ }; ++ ++ lcd@0 { ++ compatible = "fsl,lcd"; ++ ipu_id = <0>; ++ disp_id = <0>; ++ default_ifmt = "RGB24"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ipu1_1>; ++ status = "okay"; ++ }; ++ ++ v4l2_out { ++ compatible = "fsl,mxc_v4l2_output"; ++ status = "okay"; ++ }; ++}; ++ ++&iomuxc { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hog>; ++ ++ hog { ++ pinctrl_hog: hoggrp { ++ fsl,pins = < ++ /* SATA PWR */ ++ MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 ++ MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x80000000 ++ MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 ++ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 ++ /* SATA CTRL */ ++ MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x80000000 ++ MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x80000000 ++ MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x80000000 ++ MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 ++ /* POWER_BUTTON */ ++ MX6QDL_PAD_ENET_TXD1__GPIO1_IO29 0x80000000 ++ >; ++ }; ++ }; ++ ++ imx6q-cm-fx6 { ++ /* pins for eth0 */ ++ pinctrl_enet: enetgrp { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ >; ++ }; ++ ++ /* pins for spi */ ++ pinctrl_ecspi1: ecspi1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x100b1 ++ MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x100b1 ++ >; ++ }; ++ ++ /* pins for nand */ ++ pinctrl_gpmi_nand: gpminandgrp { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ ++ /* pins for i2c2 */ ++ pinctrl_i2c2: i2c2grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for i2c3 */ ++ pinctrl_i2c3: i2c3grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for console */ ++ pinctrl_uart4: uart4grp { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ /* pins for usb hub1 */ ++ pinctrl_usbh1: usbh1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 ++ >; ++ }; ++ ++ /* pins for usb otg */ ++ pinctrl_usbotg: usbotggrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 ++ >; ++ }; ++ ++ /* pins for wifi/bt */ ++ pinctrl_usdhc1: usdhc1grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17071 ++ MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10071 ++ MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071 ++ MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071 ++ MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071 ++ MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071 ++ >; ++ }; ++ ++ /* pins for pcie */ ++ pinctrl_pcie: pciegrp { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 ++ MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 ++ >; ++ }; ++ ++ /* pins for spdif */ ++ pinctrl_spdif: spdifgrp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_19__SPDIF_OUT 0x1b0b0 ++ >; ++ }; ++ ++ /* pins for audmux */ ++ pinctrl_audmux: audmuxgrp { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__AUD4_RXC 0x17059 ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x17059 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x17059 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x17059 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++/* spi */ ++&ecspi1 { ++ fsl,spi-num-chipselects = <2>; ++ cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_ecspi1>; ++ status = "okay"; ++ ++ flash: m25p80@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "st,m25px16", "st,m25p"; ++ spi-max-frequency = <20000000>; ++ reg = <0>; ++ ++ partition@0 { ++ label = "uboot"; ++ reg = <0x0 0xc0000>; ++ }; ++ ++ partition@c0000 { ++ label = "uboot environment"; ++ reg = <0xc0000 0x40000>; ++ }; ++ ++ partition@100000 { ++ label = "reserved"; ++ reg = <0x100000 0x100000>; ++ }; ++ }; ++}; ++ ++/* eth0 */ ++&fec { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_enet>; ++ phy-mode = "rgmii"; ++ status = "okay"; ++}; ++ ++/* nand */ ++&gpmi { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_gpmi_nand>; ++ status = "okay"; ++}; ++ ++/* i2c3 */ ++&i2c3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c3>; ++ status = "okay"; ++ ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++}; ++ ++&pcie { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_pcie>; ++ reset-gpio = <&gpio1 26 0>; ++ power-on-gpio = <&gpio2 24 0>; ++ status = "okay"; ++}; ++ ++/* sata */ ++&sata { ++ status = "okay"; ++}; ++ ++/* console */ ++&uart4 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart4>; ++ status = "okay"; ++}; ++ ++/* usb otg */ ++&usbotg { ++ vbus-supply = <®_usb_otg_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbotg>; ++ dr_mode = "otg"; ++ status = "okay"; ++}; ++ ++/* usb hub1 */ ++&usbh1 { ++ vbus-supply = <®_usb_h1_vbus>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usbh1>; ++ status = "okay"; ++}; ++ ++/* wifi/bt */ ++&usdhc1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc1>; ++ non-removable; ++ vmmc-supply = <&awnh387_npoweron>; ++ vmmc_aux-supply = <&awnh387_wifi_nreset>; ++ status = "okay"; ++}; ++ ++&mxcfb1 { ++ status = "okay"; ++}; ++ ++&mxcfb2 { ++ status = "okay"; ++}; ++ ++&hdmi { ++ ipu_id = <1>; ++ disp_id = <0>; ++ status = "okay"; ++}; ++ ++&hdmi_video { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_hdmi_hdcp_1>; ++ fsl,hdcp; ++ status = "okay"; ++}; ++ ++&hdmi_audio { ++ status = "okay"; ++}; ++ ++&spdif { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_spdif>; ++ status = "okay"; ++}; ++ ++&audmux { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_audmux>; ++ status = "okay"; ++}; ++ ++&snvs_poweroff { ++ status = "okay"; ++}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +new file mode 100644 +index 0000000..acfc572 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6.dtsi +@@ -0,0 +1,14 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q-sb-fx6x.dtsi" +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +new file mode 100644 +index 0000000..acbb050 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6m.dtsi +@@ -0,0 +1,35 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q-sb-fx6x.dtsi" ++ ++/ { ++ aliases { ++ ethernet1 = ð1; ++ }; ++ ++ eth1: ethernet@pcie { ++ compatible = "intel,i211"; ++ status = "okay"; ++ }; ++ ++ gpio-keys { ++ compatible = "gpio-keys"; ++ power { ++ label = "Power Button"; ++ gpios = <&gpio1 29 1>; ++ linux,code = <116>; /* KEY_POWER */ ++ gpio-key,wakeup; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +new file mode 100644 +index 0000000..9f67b3e +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sb-fx6x.dtsi +@@ -0,0 +1,75 @@ ++/* ++ * Copyright 2014 CompuLab Ltd. ++ * ++ * Author: Valentin Raevsky ++ * ++ * The code contained herein is licensed under the GNU General Public ++ * License. You may obtain a copy of the GNU General Public License ++ * Version 2 or later at the following locations: ++ * ++ * http://www.opensource.org/licenses/gpl-license.html ++ * http://www.gnu.org/copyleft/gpl.html ++ */ ++ ++#include "imx6q.dtsi" ++ ++/ { ++ regulators { ++ compatible = "simple-bus"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ /* regulator for mmc */ ++ reg_3p3v: 3p3v { ++ compatible = "regulator-fixed"; ++ regulator-name = "3P3V"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-always-on; ++ }; ++ }; ++ ++}; ++ ++&iomuxc { ++ imx6q-sb-fx6x { ++ /* pins for i2c1 */ ++ pinctrl_i2c1: i2c1grp { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ /* pins for mmc */ ++ pinctrl_usdhc3: usdhc3grp { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ }; ++}; ++ ++/* i2c1 */ ++&i2c1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_i2c1>; ++ eeprom@50 { ++ compatible = "at24,24c02"; ++ reg = <0x50>; ++ pagesize = <16>; ++ }; ++}; ++ ++/* mmc */ ++&usdhc3 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_usdhc3>; ++ vmmc-supply = <®_3p3v>; ++ status = "disabled"; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6.dts b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +new file mode 100644 +index 0000000..33e4f33 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6.dts +@@ -0,0 +1,25 @@ ++/* ++* Copyright 2014 CompuLab Ltd. ++* ++* Author: Valentin Raevsky ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++/dts-v1/; ++#include "imx6q-sb-fx6x.dtsi" ++#include "imx6q-cm-fx6.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6", "fsl,imx6q"; ++}; ++ ++&usdhc3 { ++ status = "okay"; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q-sbc-fx6m.dts b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +new file mode 100644 +index 0000000..2282250 +--- /dev/null ++++ b/arch/arm/boot/dts/imx6q-sbc-fx6m.dts +@@ -0,0 +1,59 @@ ++/* ++* Copyright 2014 CompuLab Ltd. ++* ++* Author: Valentin Raevsky ++* ++* The code contained herein is licensed under the GNU General Public ++* License. You may obtain a copy of the GNU General Public License ++* Version 2 or later at the following locations: ++* ++* http://www.opensource.org/licenses/gpl-license.html ++* http://www.gnu.org/copyleft/gpl.html ++*/ ++ ++/dts-v1/; ++#include "imx6q-sb-fx6m.dtsi" ++#include "imx6q-cm-fx6.dtsi" ++ ++/ { ++ model = "CompuLab CM-FX6 on SBC-FX6m"; ++ compatible = "compulab,cm-fx6", "compulab,sbc-fx6m", "fsl,imx6q"; ++ ++}; ++ ++&iomuxc { ++ imx6q-sbc-fx6m { ++ /* pins for uart2 */ ++ pinctrl_uart2: uart2grp { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT5__UART2_RTS_B 0x1b0b1 ++ MX6QDL_PAD_SD4_DAT6__UART2_CTS_B 0x1b0b1 ++ >; ++ }; ++ }; ++}; ++ ++ ++&i2c1 { ++ rtc@56 { ++ compatible = "emmicro,em3027"; ++ reg = <0x56>; ++ }; ++}; ++ ++&usdhc3 { ++ status = "okay"; ++}; ++ ++/* rear serial console */ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinctrl_uart2>; ++ /* fsl,dte-mode; */ ++ fsl,uart-has-rtscts; ++ dma-names = "rx", "tx"; ++ dmas = <&sdma 27 4 0>, <&sdma 28 4 0>; ++ status = "okay"; ++}; +\ No newline at end of file +diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi +index 93ec79b..7ec4008 100644 +--- a/arch/arm/boot/dts/imx6q.dtsi ++++ b/arch/arm/boot/dts/imx6q.dtsi +@@ -103,42 +103,6 @@ + + iomuxc: iomuxc@020e0000 { + compatible = "fsl,imx6q-iomuxc"; +- +- ipu2 { +- pinctrl_ipu2_1: ipu2grp-1 { +- fsl,pins = < +- MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10 +- MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0x10 +- MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0x10 +- MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0x10 +- MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04 0x80000000 +- MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0x10 +- MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0x10 +- MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0x10 +- MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0x10 +- MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0x10 +- MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0x10 +- MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0x10 +- MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0x10 +- MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0x10 +- MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0x10 +- MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0x10 +- MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0x10 +- MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0x10 +- MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0x10 +- MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0x10 +- MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0x10 +- MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 0x10 +- MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 0x10 +- MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 0x10 +- MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 0x10 +- MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 0x10 +- MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 0x10 +- MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 0x10 +- MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 0x10 +- >; +- }; +- }; + }; + }; + +@@ -219,6 +183,30 @@ + }; + }; + }; ++ ++ ++ gpu-subsystem { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "vivante,gccore"; ++ ranges; ++ ++ gpu2d@00134000 { ++ compatible = "vivante,vivante-gpu-2d"; ++ reg = <0x00134000 0x4000>; ++ clock-names = "core", "bus"; ++ clocks = <&clks 121>, <&clks 26>; ++ interrupts = <0 10 0x04>; ++ }; ++ ++ gpu3d@00130000 { ++ compatible = "vivante,vivante-gpu-3d"; ++ reg = <0x00130000 0x4000>; ++ clock-names = "core", "shader", "bus"; ++ clocks = <&clks 122>, <&clks 74>, <&clks 27>; ++ interrupts = <0 9 0x04>; ++ }; ++ }; + }; + + display-subsystem { +@@ -314,3 +302,41 @@ + &vpu { + compatible = "fsl,imx6q-vpu", "cnm,coda960"; + }; ++ ++&iomuxc { ++ ipu2 { ++ pinctrl_ipu2_1: ipu2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0x10 ++ MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15 0x10 ++ MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02 0x10 ++ MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03 0x10 ++ MX6QDL_PAD_DI0_PIN4__IPU2_DI0_PIN04 0x80000000 ++ MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00 0x10 ++ MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01 0x10 ++ MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02 0x10 ++ MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03 0x10 ++ MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04 0x10 ++ MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05 0x10 ++ MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06 0x10 ++ MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07 0x10 ++ MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08 0x10 ++ MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09 0x10 ++ MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10 0x10 ++ MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11 0x10 ++ MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12 0x10 ++ MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13 0x10 ++ MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14 0x10 ++ MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15 0x10 ++ MX6QDL_PAD_DISP0_DAT16__IPU2_DISP0_DATA16 0x10 ++ MX6QDL_PAD_DISP0_DAT17__IPU2_DISP0_DATA17 0x10 ++ MX6QDL_PAD_DISP0_DAT18__IPU2_DISP0_DATA18 0x10 ++ MX6QDL_PAD_DISP0_DAT19__IPU2_DISP0_DATA19 0x10 ++ MX6QDL_PAD_DISP0_DAT20__IPU2_DISP0_DATA20 0x10 ++ MX6QDL_PAD_DISP0_DAT21__IPU2_DISP0_DATA21 0x10 ++ MX6QDL_PAD_DISP0_DAT22__IPU2_DISP0_DATA22 0x10 ++ MX6QDL_PAD_DISP0_DAT23__IPU2_DISP0_DATA23 0x10 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi +index d6c69ec..623e413 100644 +--- a/arch/arm/boot/dts/imx6qdl.dtsi ++++ b/arch/arm/boot/dts/imx6qdl.dtsi +@@ -762,6 +762,7 @@ + }; + + hdmi: hdmi@0120000 { ++ compatible = "fsl,imx6dl-hdmi"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x00120000 0x9000>; +@@ -789,6 +790,33 @@ + }; + }; + ++ hdmi_video: hdmi_video@020e0000 { ++ compatible = "fsl,imx6dl-hdmi-video"; ++ reg = <0x020e0000 0x1000>; ++ interrupts = <0 115 0x04>; ++ gpr = <&gpr>; ++ clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>, ++ <&clks IMX6QDL_CLK_HDMI_ISFR>; ++ clock-names = "iahb", "isfr"; ++ status = "disabled"; ++ }; ++ ++ hdmi_audio: hdmi_audio@0120000 { ++ compatible = "fsl,imx6dl-hdmi-audio"; ++ clocks = <&clks IMX6QDL_CLK_HDMI_IAHB>, ++ <&clks IMX6QDL_CLK_HDMI_ISFR>; ++ clock-names = "iahb", "isfr"; ++ dmas = <&sdma 2 22 0>; ++ dma-names = "tx"; ++ status = "disabled"; ++ }; ++ ++ hdmi_cec: hdmi_cec@0120000 { ++ compatible = "fsl,imx6dl-hdmi-cec"; ++ interrupts = <0 116 0x04>; ++ status = "disabled"; ++ }; ++ + dcic1: dcic@020e4000 { + reg = <0x020e4000 0x4000>; + interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>; +@@ -1166,3 +1194,672 @@ + }; + }; + }; ++ ++ ++&iomuxc { ++ audmux { ++ pinctrl_audmux_1: audmux-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x80000000 ++ MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x80000000 ++ MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x80000000 ++ MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x80000000 ++ >; ++ }; ++ ++ pinctrl_audmux_2: audmux-2 { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x80000000 ++ MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x80000000 ++ MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x80000000 ++ MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x80000000 ++ >; ++ }; ++ ++ pinctrl_audmux_3: audmux-3 { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT16__AUD5_TXC 0x80000000 ++ MX6QDL_PAD_DISP0_DAT18__AUD5_TXFS 0x80000000 ++ MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000 ++ >; ++ }; ++ }; ++ ++ ecspi1 { ++ pinctrl_ecspi1_1: ecspi1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 ++ >; ++ }; ++ ++ pinctrl_ecspi1_2: ecspi1grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 ++ MX6QDL_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 ++ MX6QDL_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 ++ >; ++ }; ++ }; ++ ++ ecspi3 { ++ pinctrl_ecspi3_1: ecspi3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1 ++ MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1 ++ MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1 ++ >; ++ }; ++ }; ++ ++ enet { ++ pinctrl_enet_1: enetgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ >; ++ }; ++ ++ pinctrl_enet_2: enetgrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL1__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_KEY_COL2__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 ++ >; ++ }; ++ ++ pinctrl_enet_3: enetgrp-3 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 ++ MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 ++ MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 ++ MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 ++ MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 ++ MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 ++ >; ++ }; ++ }; ++ ++ esai { ++ pinctrl_esai_1: esaigrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RXD0__ESAI_TX_HF_CLK 0x1b030 ++ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 ++ MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030 ++ MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030 ++ MX6QDL_PAD_ENET_TXD1__ESAI_TX2_RX3 0x1b030 ++ MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030 ++ MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030 ++ MX6QDL_PAD_NANDF_CS2__ESAI_TX0 0x1b030 ++ MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030 ++ >; ++ }; ++ ++ pinctrl_esai_2: esaigrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_CRS_DV__ESAI_TX_CLK 0x1b030 ++ MX6QDL_PAD_ENET_RXD1__ESAI_TX_FS 0x1b030 ++ MX6QDL_PAD_ENET_TX_EN__ESAI_TX3_RX2 0x1b030 ++ MX6QDL_PAD_GPIO_5__ESAI_TX2_RX3 0x1b030 ++ MX6QDL_PAD_ENET_TXD0__ESAI_TX4_RX1 0x1b030 ++ MX6QDL_PAD_ENET_MDC__ESAI_TX5_RX0 0x1b030 ++ MX6QDL_PAD_GPIO_17__ESAI_TX0 0x1b030 ++ MX6QDL_PAD_NANDF_CS3__ESAI_TX1 0x1b030 ++ MX6QDL_PAD_ENET_MDIO__ESAI_RX_CLK 0x1b030 ++ MX6QDL_PAD_GPIO_9__ESAI_RX_FS 0x1b030 ++ >; ++ }; ++ }; ++ ++ flexcan1 { ++ pinctrl_flexcan1_1: flexcan1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 ++ MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x80000000 ++ >; ++ }; ++ ++ pinctrl_flexcan1_2: flexcan1grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x80000000 ++ MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x80000000 ++ >; ++ }; ++ }; ++ ++ flexcan2 { ++ pinctrl_flexcan2_1: flexcan2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000 ++ MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000 ++ >; ++ }; ++ }; ++ ++ gpmi-nand { ++ pinctrl_gpmi_nand_1: gpmi-nand-1 { ++ fsl,pins = < ++ MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 ++ MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 ++ MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 ++ MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 ++ MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 ++ MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 ++ MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 ++ MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 ++ MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 ++ MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 ++ MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 ++ MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 ++ MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 ++ MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 ++ MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 ++ MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 ++ MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 ++ >; ++ }; ++ }; ++ ++ hdmi_hdcp { ++ pinctrl_hdmi_hdcp_1: hdmihdcpgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__HDMI_TX_DDC_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_hdmi_hdcp_2: hdmihdcpgrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D16__HDMI_TX_DDC_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_hdmi_hdcp_3: hdmihdcpgrp-3 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_EB2__HDMI_TX_DDC_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__HDMI_TX_DDC_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ hdmi_cec { ++ pinctrl_hdmi_cec_1: hdmicecgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0 ++ >; ++ }; ++ ++ pinctrl_hdmi_cec_2: hdmicecgrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0 ++ >; ++ }; ++ }; ++ ++ i2c1 { ++ pinctrl_i2c1_1: i2c1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c1_2: i2c1grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 ++ MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c2 { ++ pinctrl_i2c2_1: i2c2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c2_2: i2c2grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c2_3: i2c2grp-3 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1 ++ MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c3 { ++ pinctrl_i2c3_1: i2c3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3_2: i2c3grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3_3: i2c3grp-3 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ ++ pinctrl_i2c3_4: i2c3grp-4 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 ++ MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ ipu1 { ++ pinctrl_ipu1_1: ipu1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10 ++ MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10 ++ MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10 ++ MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10 ++ MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000 ++ MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10 ++ MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10 ++ MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10 ++ MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10 ++ MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10 ++ MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10 ++ MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10 ++ MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10 ++ MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10 ++ MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10 ++ MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10 ++ MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10 ++ MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10 ++ MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10 ++ MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10 ++ MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10 ++ MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10 ++ MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10 ++ MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10 ++ MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10 ++ MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10 ++ MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10 ++ MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10 ++ MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10 ++ >; ++ }; ++ ++ pinctrl_ipu1_2: ipu1grp-2 { /* parallel camera */ ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 ++ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 ++ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 ++ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 ++ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 ++ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 ++ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 ++ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 ++ MX6QDL_PAD_CSI0_DATA_EN__IPU1_CSI0_DATA_EN 0x80000000 ++ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 ++ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 ++ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 ++ >; ++ }; ++ ++ pinctrl_ipu1_3: ipu1grp-3 { /* parallel port 16-bit */ ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 ++ MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000 ++ MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000 ++ MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000 ++ MX6QDL_PAD_CSI0_DAT8__IPU1_CSI0_DATA08 0x80000000 ++ MX6QDL_PAD_CSI0_DAT9__IPU1_CSI0_DATA09 0x80000000 ++ MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x80000000 ++ MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x80000000 ++ MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12 0x80000000 ++ MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13 0x80000000 ++ MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14 0x80000000 ++ MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15 0x80000000 ++ MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16 0x80000000 ++ MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17 0x80000000 ++ MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18 0x80000000 ++ MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19 0x80000000 ++ MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK 0x80000000 ++ MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC 0x80000000 ++ MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC 0x80000000 ++ >; ++ }; ++ }; ++ ++ mlb { ++ pinctrl_mlb_1: mlbgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_3__MLB_CLK 0x71 ++ MX6QDL_PAD_GPIO_6__MLB_SIG 0x71 ++ MX6QDL_PAD_GPIO_2__MLB_DATA 0x71 ++ >; ++ }; ++ ++ pinctrl_mlb_2: mlbgrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_TXD1__MLB_CLK 0x71 ++ MX6QDL_PAD_GPIO_6__MLB_SIG 0x71 ++ MX6QDL_PAD_GPIO_2__MLB_DATA 0x71 ++ >; ++ }; ++ }; ++ ++ pwm1 { ++ pinctrl_pwm1_1: pwm1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ pwm3 { ++ pinctrl_pwm3_1: pwm3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ spdif { ++ pinctrl_spdif_1: spdifgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_spdif_2: spdifgrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_16__SPDIF_IN 0x1b0b0 ++ MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0 ++ >; ++ }; ++ }; ++ ++ uart1 { ++ pinctrl_uart1_1: uart1grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ uart2 { ++ pinctrl_uart2_1: uart2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1 ++ >; ++ }; ++ ++ pinctrl_uart2_2: uart2grp-2 { /* DTE mode */ ++ fsl,pins = < ++ MX6QDL_PAD_EIM_D26__UART2_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D27__UART2_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D28__UART2_DTE_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ uart3 { ++ pinctrl_uart3_1: uart3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_CLK__UART3_RX_DATA 0x1b0b1 ++ MX6QDL_PAD_SD4_CMD__UART3_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1 ++ MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ uart4 { ++ pinctrl_uart4_1: uart4grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1 ++ MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ usbotg { ++ pinctrl_usbotg_1: usbotggrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 ++ >; ++ }; ++ ++ pinctrl_usbotg_2: usbotggrp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059 ++ >; ++ }; ++ }; ++ ++ usbh2 { ++ pinctrl_usbh2_1: usbh2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_TXC__USB_H2_DATA 0x40013030 ++ MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40013030 ++ >; ++ }; ++ ++ pinctrl_usbh2_2: usbh2grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_TX_CTL__USB_H2_STROBE 0x40017030 ++ >; ++ }; ++ }; ++ ++ usbh3 { ++ pinctrl_usbh3_1: usbh3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RX_CTL__USB_H3_DATA 0x40013030 ++ MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40013030 ++ >; ++ }; ++ ++ pinctrl_usbh3_2: usbh3grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_RGMII_RXC__USB_H3_STROBE 0x40017030 ++ >; ++ }; ++ }; ++ ++ usdhc2 { ++ pinctrl_usdhc2_1: usdhc2grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 ++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 ++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 ++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 ++ MX6QDL_PAD_NANDF_D4__SD2_DATA4 0x17059 ++ MX6QDL_PAD_NANDF_D5__SD2_DATA5 0x17059 ++ MX6QDL_PAD_NANDF_D6__SD2_DATA6 0x17059 ++ MX6QDL_PAD_NANDF_D7__SD2_DATA7 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc2_2: usdhc2grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059 ++ MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059 ++ MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ++ MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059 ++ MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ++ MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc3 { ++ pinctrl_usdhc3_1: usdhc3grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 ++ MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 ++ MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 ++ MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc3_2: usdhc3grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc4 { ++ pinctrl_usdhc4_1: usdhc4grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 ++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 ++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 ++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 ++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 ++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 ++ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059 ++ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059 ++ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059 ++ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059 ++ >; ++ }; ++ ++ pinctrl_usdhc4_2: usdhc4grp-2 { ++ fsl,pins = < ++ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 ++ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 ++ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 ++ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 ++ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 ++ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 ++ >; ++ }; ++ }; ++ ++ weim { ++ pinctrl_weim_cs0_1: weim_cs0grp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_CS0__EIM_CS0_B 0xb0b1 ++ >; ++ }; ++ ++ pinctrl_weim_nor_1: weim_norgrp-1 { ++ fsl,pins = < ++ MX6QDL_PAD_EIM_OE__EIM_OE_B 0xb0b1 ++ MX6QDL_PAD_EIM_RW__EIM_RW 0xb0b1 ++ MX6QDL_PAD_EIM_WAIT__EIM_WAIT_B 0xb060 ++ /* data */ ++ MX6QDL_PAD_EIM_D16__EIM_DATA16 0x1b0b0 ++ MX6QDL_PAD_EIM_D17__EIM_DATA17 0x1b0b0 ++ MX6QDL_PAD_EIM_D18__EIM_DATA18 0x1b0b0 ++ MX6QDL_PAD_EIM_D19__EIM_DATA19 0x1b0b0 ++ MX6QDL_PAD_EIM_D20__EIM_DATA20 0x1b0b0 ++ MX6QDL_PAD_EIM_D21__EIM_DATA21 0x1b0b0 ++ MX6QDL_PAD_EIM_D22__EIM_DATA22 0x1b0b0 ++ MX6QDL_PAD_EIM_D23__EIM_DATA23 0x1b0b0 ++ MX6QDL_PAD_EIM_D24__EIM_DATA24 0x1b0b0 ++ MX6QDL_PAD_EIM_D25__EIM_DATA25 0x1b0b0 ++ MX6QDL_PAD_EIM_D26__EIM_DATA26 0x1b0b0 ++ MX6QDL_PAD_EIM_D27__EIM_DATA27 0x1b0b0 ++ MX6QDL_PAD_EIM_D28__EIM_DATA28 0x1b0b0 ++ MX6QDL_PAD_EIM_D29__EIM_DATA29 0x1b0b0 ++ MX6QDL_PAD_EIM_D30__EIM_DATA30 0x1b0b0 ++ MX6QDL_PAD_EIM_D31__EIM_DATA31 0x1b0b0 ++ /* address */ ++ MX6QDL_PAD_EIM_A23__EIM_ADDR23 0xb0b1 ++ MX6QDL_PAD_EIM_A22__EIM_ADDR22 0xb0b1 ++ MX6QDL_PAD_EIM_A21__EIM_ADDR21 0xb0b1 ++ MX6QDL_PAD_EIM_A20__EIM_ADDR20 0xb0b1 ++ MX6QDL_PAD_EIM_A19__EIM_ADDR19 0xb0b1 ++ MX6QDL_PAD_EIM_A18__EIM_ADDR18 0xb0b1 ++ MX6QDL_PAD_EIM_A17__EIM_ADDR17 0xb0b1 ++ MX6QDL_PAD_EIM_A16__EIM_ADDR16 0xb0b1 ++ MX6QDL_PAD_EIM_DA15__EIM_AD15 0xb0b1 ++ MX6QDL_PAD_EIM_DA14__EIM_AD14 0xb0b1 ++ MX6QDL_PAD_EIM_DA13__EIM_AD13 0xb0b1 ++ MX6QDL_PAD_EIM_DA12__EIM_AD12 0xb0b1 ++ MX6QDL_PAD_EIM_DA11__EIM_AD11 0xb0b1 ++ MX6QDL_PAD_EIM_DA10__EIM_AD10 0xb0b1 ++ MX6QDL_PAD_EIM_DA9__EIM_AD09 0xb0b1 ++ MX6QDL_PAD_EIM_DA8__EIM_AD08 0xb0b1 ++ MX6QDL_PAD_EIM_DA7__EIM_AD07 0xb0b1 ++ MX6QDL_PAD_EIM_DA6__EIM_AD06 0xb0b1 ++ MX6QDL_PAD_EIM_DA5__EIM_AD05 0xb0b1 ++ MX6QDL_PAD_EIM_DA4__EIM_AD04 0xb0b1 ++ MX6QDL_PAD_EIM_DA3__EIM_AD03 0xb0b1 ++ MX6QDL_PAD_EIM_DA2__EIM_AD02 0xb0b1 ++ MX6QDL_PAD_EIM_DA1__EIM_AD01 0xb0b1 ++ MX6QDL_PAD_EIM_DA0__EIM_AD00 0xb0b1 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi +index 36ab8e0..1366b39 100644 +--- a/arch/arm/boot/dts/imx6sl.dtsi ++++ b/arch/arm/boot/dts/imx6sl.dtsi +@@ -825,3 +825,149 @@ + }; + }; + }; ++ ++&iomuxc { ++ fec { ++ pinctrl_fec_1: fecgrp-1 { ++ fsl,pins = < ++ MX6SL_PAD_FEC_MDC__FEC_MDC 0x1b0b0 ++ MX6SL_PAD_FEC_MDIO__FEC_MDIO 0x1b0b0 ++ MX6SL_PAD_FEC_CRS_DV__FEC_RX_DV 0x1b0b0 ++ MX6SL_PAD_FEC_RXD0__FEC_RX_DATA0 0x1b0b0 ++ MX6SL_PAD_FEC_RXD1__FEC_RX_DATA1 0x1b0b0 ++ MX6SL_PAD_FEC_TX_EN__FEC_TX_EN 0x1b0b0 ++ MX6SL_PAD_FEC_TXD0__FEC_TX_DATA0 0x1b0b0 ++ MX6SL_PAD_FEC_TXD1__FEC_TX_DATA1 0x1b0b0 ++ MX6SL_PAD_FEC_REF_CLK__FEC_REF_OUT 0x4001b0a8 ++ >; ++ }; ++ }; ++ ++ i2c1 { ++ pinctrl_i2c1_1: i2c1grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_I2C1_SCL__I2C1_SCL 0x4001b8b1 ++ MX6SL_PAD_I2C1_SDA__I2C1_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c2 { ++ pinctrl_i2c2_1: i2c2grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_I2C2_SCL__I2C2_SCL 0x4001b8b1 ++ MX6SL_PAD_I2C2_SDA__I2C2_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ i2c3 { ++ pinctrl_i2c3_1: i2c3grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_EPDC_SDCE2__I2C3_SCL 0x4001b8b1 ++ MX6SL_PAD_EPDC_SDCE3__I2C3_SDA 0x4001b8b1 ++ >; ++ }; ++ }; ++ ++ lcdif { ++ pinctrl_lcdif_dat_0: lcdifdatgrp-0 { ++ fsl,pins = < ++ MX6SL_PAD_LCD_DAT0__LCD_DATA00 0x1b0b0 ++ MX6SL_PAD_LCD_DAT1__LCD_DATA01 0x1b0b0 ++ MX6SL_PAD_LCD_DAT2__LCD_DATA02 0x1b0b0 ++ MX6SL_PAD_LCD_DAT3__LCD_DATA03 0x1b0b0 ++ MX6SL_PAD_LCD_DAT4__LCD_DATA04 0x1b0b0 ++ MX6SL_PAD_LCD_DAT5__LCD_DATA05 0x1b0b0 ++ MX6SL_PAD_LCD_DAT6__LCD_DATA06 0x1b0b0 ++ MX6SL_PAD_LCD_DAT7__LCD_DATA07 0x1b0b0 ++ MX6SL_PAD_LCD_DAT8__LCD_DATA08 0x1b0b0 ++ MX6SL_PAD_LCD_DAT9__LCD_DATA09 0x1b0b0 ++ MX6SL_PAD_LCD_DAT10__LCD_DATA10 0x1b0b0 ++ MX6SL_PAD_LCD_DAT11__LCD_DATA11 0x1b0b0 ++ MX6SL_PAD_LCD_DAT12__LCD_DATA12 0x1b0b0 ++ MX6SL_PAD_LCD_DAT13__LCD_DATA13 0x1b0b0 ++ MX6SL_PAD_LCD_DAT14__LCD_DATA14 0x1b0b0 ++ MX6SL_PAD_LCD_DAT15__LCD_DATA15 0x1b0b0 ++ MX6SL_PAD_LCD_DAT16__LCD_DATA16 0x1b0b0 ++ MX6SL_PAD_LCD_DAT17__LCD_DATA17 0x1b0b0 ++ MX6SL_PAD_LCD_DAT18__LCD_DATA18 0x1b0b0 ++ MX6SL_PAD_LCD_DAT19__LCD_DATA19 0x1b0b0 ++ MX6SL_PAD_LCD_DAT20__LCD_DATA20 0x1b0b0 ++ MX6SL_PAD_LCD_DAT21__LCD_DATA21 0x1b0b0 ++ MX6SL_PAD_LCD_DAT22__LCD_DATA22 0x1b0b0 ++ MX6SL_PAD_LCD_DAT23__LCD_DATA23 0x1b0b0 ++ >; ++ }; ++ ++ pinctrl_lcdif_ctrl_0: lcdifctrlgrp-0 { ++ fsl,pins = < ++ MX6SL_PAD_LCD_CLK__LCD_CLK 0x1b0b0 ++ MX6SL_PAD_LCD_ENABLE__LCD_ENABLE 0x1b0b0 ++ MX6SL_PAD_LCD_HSYNC__LCD_HSYNC 0x1b0b0 ++ MX6SL_PAD_LCD_VSYNC__LCD_VSYNC 0x1b0b0 ++ MX6SL_PAD_LCD_RESET__LCD_RESET 0x1b0b0 ++ >; ++ }; ++ }; ++ ++ pwm1 { ++ pinctrl_pwm1_0: pwm1grp-0 { ++ fsl,pins = < ++ MX6SL_PAD_PWM1__PWM1_OUT 0x110b0 ++ >; ++ }; ++ }; ++ ++ uart1 { ++ pinctrl_uart1_1: uart1grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_UART1_RXD__UART1_RX_DATA 0x1b0b1 ++ MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1 ++ >; ++ }; ++ }; ++ ++ usdhc1 { ++ pinctrl_usdhc1_1: usdhc1grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_SD1_CMD__SD1_CMD 0x17059 ++ MX6SL_PAD_SD1_CLK__SD1_CLK 0x10059 ++ MX6SL_PAD_SD1_DAT0__SD1_DATA0 0x17059 ++ MX6SL_PAD_SD1_DAT1__SD1_DATA1 0x17059 ++ MX6SL_PAD_SD1_DAT2__SD1_DATA2 0x17059 ++ MX6SL_PAD_SD1_DAT3__SD1_DATA3 0x17059 ++ MX6SL_PAD_SD1_DAT4__SD1_DATA4 0x17059 ++ MX6SL_PAD_SD1_DAT5__SD1_DATA5 0x17059 ++ MX6SL_PAD_SD1_DAT6__SD1_DATA6 0x17059 ++ MX6SL_PAD_SD1_DAT7__SD1_DATA7 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc2 { ++ pinctrl_usdhc2_1: usdhc2grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_SD2_CMD__SD2_CMD 0x17059 ++ MX6SL_PAD_SD2_CLK__SD2_CLK 0x10059 ++ MX6SL_PAD_SD2_DAT0__SD2_DATA0 0x17059 ++ MX6SL_PAD_SD2_DAT1__SD2_DATA1 0x17059 ++ MX6SL_PAD_SD2_DAT2__SD2_DATA2 0x17059 ++ MX6SL_PAD_SD2_DAT3__SD2_DATA3 0x17059 ++ >; ++ }; ++ }; ++ ++ usdhc3 { ++ pinctrl_usdhc3_1: usdhc3grp-1 { ++ fsl,pins = < ++ MX6SL_PAD_SD3_CMD__SD3_CMD 0x17059 ++ MX6SL_PAD_SD3_CLK__SD3_CLK 0x10059 ++ MX6SL_PAD_SD3_DAT0__SD3_DATA0 0x17059 ++ MX6SL_PAD_SD3_DAT1__SD3_DATA1 0x17059 ++ MX6SL_PAD_SD3_DAT2__SD3_DATA2 0x17059 ++ MX6SL_PAD_SD3_DAT3__SD3_DATA3 0x17059 ++ >; ++ }; ++ }; ++}; +diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c +index d04a430..f360487 100644 +--- a/arch/arm/mach-imx/clk-imx6q.c ++++ b/arch/arm/mach-imx/clk-imx6q.c +@@ -492,6 +492,9 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI0_SEL], clk[IMX6QDL_CLK_IPU2_DI0_PRE]); + clk_set_parent(clk[IMX6QDL_CLK_IPU2_DI1_SEL], clk[IMX6QDL_CLK_IPU2_DI1_PRE]); + ++ if (cpu_is_imx6dl()) ++ clk_set_parent(clk[IMX6QDL_CLK_IPU1_SEL], clk[IMX6QDL_CLK_PLL3_PFD1_540M]); ++ + /* + * The gpmi needs 100MHz frequency in the EDO/Sync mode, + * We can not get the 100MHz from the pll2_pfd0_352m. +diff --git a/drivers/net/ethernet/intel/igb/igb_main.c b/drivers/net/ethernet/intel/igb/igb_main.c +index f366b3b..4c8c8a1 100644 +--- a/drivers/net/ethernet/intel/igb/igb_main.c ++++ b/drivers/net/ethernet/intel/igb/igb_main.c +@@ -2223,6 +2223,30 @@ static s32 igb_init_i2c(struct igb_adapter *adapter) + return status; + } + ++ ++/** ++ * igb_read_mac_addr_dts - Read mac addres from the device tree ++ * blob ++ * @adapter: pointer to adapter structure ++ **/ ++static void igb_read_mac_addr_dts(struct e1000_hw *hw) ++{ ++ struct device_node *dn; ++ const uint8_t *mac; ++ ++ dn = of_find_compatible_node(NULL, NULL, "intel,i211"); ++ ++ if (!dn) ++ return; ++ ++ mac = of_get_property(dn, "local-mac-address", NULL); ++ ++ if (mac) ++ memcpy(hw->mac.addr, mac, ETH_ALEN); ++ ++ return; ++} ++ + /** + * igb_probe - Device Initialization Routine + * @pdev: PCI device information struct +@@ -2425,6 +2449,14 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent) + if (hw->mac.ops.read_mac_addr(hw)) + dev_err(&pdev->dev, "NVM Read Error\n"); + ++ if (!is_valid_ether_addr(hw->mac.addr)) ++ igb_read_mac_addr_dts(hw); ++ ++ if (!is_valid_ether_addr(hw->mac.addr)) { ++ dev_info(&pdev->dev, "Random MAC Address\n"); ++ random_ether_addr(hw->mac.addr); ++ } ++ + memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len); + + if (!is_valid_ether_addr(netdev->dev_addr)) { diff --git a/derivations/dev/cross.nix b/derivations/dev/cross.nix new file mode 100644 index 0000000..59b6b3d --- /dev/null +++ b/derivations/dev/cross.nix @@ -0,0 +1,89 @@ +import /home/steveej/src/github/NixOS/nixpkgs/default.nix { + crossSystem = rec { + config = "armv7l-unknown-linux-gnueabi"; + bigEndian = false; + arch = "arm"; + float = "hard"; + fpu = "vfpv3-d16"; + withTLS = true; + libc = "glibc"; + platform = { + name = "armv7l-hf-multiplatform"; + gcc = { + arch = "armv7-a"; + fpu = "neon"; + float = "hard"; + }; + kernelMajor = "2.6"; # Using "2.6" enables 2.6 kernel syscalls in glibc. + kernelHeadersBaseConfig = "multi_v7_defconfig"; + kernelBaseConfig = "multi_v7_defconfig"; + kernelArch = "arm"; + kernelDTB = true; + kernelAutoModules = false; + kernelExtraConfig = '' + NAMESPACES y + BTRFS_FS y + BTRFS_FS_POSIX_ACL y + OVERLAY_FS y + FUSE_FS y + ''; + kernelTarget = "zImage"; + uboot = null; + }; + openssl.system = "linux-generic32"; + gcc = { + arch = "armv7-a"; + fpu = "neon"; + float = "hard"; + }; + }; +} +# pkgs.config = { +# packageOverrides = super: let self = super.pkgs; in { +# linux_4_0 = super.linux_3_18.override { +# kernelPatches = super.linux_3_18.kernelPatches ++ [ +# # we'll also add one of our own patches +# { patch = ./dts.patch; name = "dts-fix"; } +# ]; +# +# # add "CONFIG_PPP_FILTER y" option to the set of kernel options +# extraConfig = '' +# HAVE_IMX_ANATOP y +# HAVE_IMX_GPC y +# HAVE_IMX_MMDC y +# HAVE_IMX_SRC y +# SOC_IMX6 y +# SOC_IMX6Q y +# SOC_IMX6SL y +# PCI_IMX6 y +# ARM_IMX6Q_CPUFREQ y +# IMX_WEIM y +# AHCI_IMX y +# SERIAL_IMX y +# SERIAL_IMX_CONSOLE y +# I2C_IMX y +# SPI_IMX y +# PINCTRL_IMX y +# PINCTRL_IMX6Q y +# PINCTRL_IMX6SL y +# POWER_RESET_IMX y +# IMX_THERMAL y +# IMX2_WDT y +# IMX_IPUV3_CORE y +# DRM_IMX y +# DRM_IMX_FB_HELPER y +# DRM_IMX_PARALLEL_DISPLAY y +# DRM_IMX_TVE y +# DRM_IMX_LDB y +# DRM_IMX_IPUV3 y +# DRM_IMX_HDMI y +# MMC_SDHCI_ESDHC_IMX y +# IMX_SDMA y +# PWM_IMX y +# DEBUG_IMX6Q_UART y +# +# PPP_FILTER y +# ''; +# }; +# }; +# }; diff --git a/derivations/dev/go.nix b/derivations/dev/go.nix new file mode 100644 index 0000000..8841f21 --- /dev/null +++ b/derivations/dev/go.nix @@ -0,0 +1,39 @@ +{ +pkgs ? import /home/steveej/src/github/NixOS/nixpkgs-systemsource {}, +name ? "generic", +version, +extraBuildInputs ? [] }: +let + goPackages = builtins.getAttr "go${version}Packages" pkgs; + goBuildInputs = { goPackages }: [ + goPackages.go + goPackages.tools + goPackages.tools.bin + goPackages.gocode + goPackages.gocode.bin + goPackages.godef + goPackages.godef.bin + goPackages.godep + goPackages.godep.bin + goPackages.gox.bin + ]; + goShellHook = { goPackages, name }: '' + goname=${goPackages.go.version}_$name + export GOROOT=${goPackages.go}/share/go + export GOPATH="$HOME/.gopath_$goname" + export PATH="$HOME/.gopath_$goname/bin:$PATH" + unset name + ''; +in pkgs.stdenv.mkDerivation { + inherit name; + buildInputs = extraBuildInputs ++ (goBuildInputs){ inherit goPackages; }; + shellHook = (goShellHook) { inherit name; inherit goPackages; }; +# go14Env = mkGoEnv { +# inherit name; +# goPackages=pkgs.go14Packages; +# }; +# go15 = mkGoEnv { +# inherit name; +# goPackages=pkgs.go15Packages; +# }; +} diff --git a/derivations/dev/rkt.nix b/derivations/dev/rkt.nix new file mode 100644 index 0000000..3e63233 --- /dev/null +++ b/derivations/dev/rkt.nix @@ -0,0 +1,43 @@ +{ +pkgs ? import /home/steveej/src/github/NixOS/nixpkgs-systemsource {}, +mkGoEnv ? import ./go.nix, +}: +let + rktBasebuildInputs = with pkgs; [ + autoconf + automake + autogen + gnupg1 + squashfsTools + cpio + tree + intltool + libtool + pkgconfig + libgcrypt + gperf + libcap + libseccomp + libzip + eject + iptables + bc + acl + ]; +in { + go15 = mkGoEnv { + inherit pkgs; + + name = "rktGo15"; + version = "15"; + extraBuildInputs = rktBasebuildInputs; + }; + + go16 = mkGoEnv { + inherit pkgs; + + name = "rktGo16"; + version = "16"; + extraBuildInputs = rktBasebuildInputs; + }; +} diff --git a/derivations/pkgs/nomad/default.nix b/derivations/pkgs/nomad/default.nix new file mode 100644 index 0000000..4214ce9 --- /dev/null +++ b/derivations/pkgs/nomad/default.nix @@ -0,0 +1,29 @@ +with import {}; + +stdenv.mkDerivation rec { + name = "nomad"; + version = "0.1.2"; + filename = "nomad_${version}_linux_amd64.zip"; + + src = fetchurl { + url = "https://releases.hashicorp.com/nomad/${version}/${filename}"; + sha256 = "0d3r3n1wwlic1kg3hgghds7f3b0qhh97v8xf36mcmsnmn2ngfd9k"; + }; + + unpackPhase = '' + unzip ${src} + ''; + + + buildInputs = [ makeWrapper unzip ]; + libPath = lib.makeLibraryPath [ ]; + installPhase = '' + patchelf --set-interpreter ${stdenv.glibc}/lib/ld-linux-x86-64.so.2 ./nomad + + mkdir -p $out/bin + cp ./nomad $out/bin/nomad +# wrapProgram $out/bin/nomad \ +# --prefix LD_LIBRARY_PATH : "${libPath}" +# + ''; +} diff --git a/ops/nano/configuration.nix b/ops/nano/configuration.nix new file mode 100644 index 0000000..afc3626 --- /dev/null +++ b/ops/nano/configuration.nix @@ -0,0 +1,65 @@ +# Edit this configuration file to define what should be installed on +# your system. Help is available in the configuration.nix(5) man page +# and in the NixOS manual (accessible by running ‘nixos-help’). + +{ n, pkgs, ... }: + +{ + imports = + [ # Include the results of the hardware scan. + ./hardware-configuration.nix + ]; + + # Use the GRUB 2 boot loader. + boot.loader.grub.enable = true; + boot.loader.grub.version = 2; + # Define on which hard drive you want to install Grub. + boot.loader.grub.device = "/dev/sdb"; + + networking.hostName = "nano${toString n}"; # Define your hostname. + # networking.wireless.enable = true; # Enables wireless support via wpa_supplicant. + + # Select internationalisation properties. + # i18n = { + # consoleFont = "Lat2-Terminus16"; + # consoleKeyMap = "us"; + # defaultLocale = "en_US.UTF-8"; + # }; + + # Set your time zone. + # time.timeZone = "Europe/Amsterdam"; + + # List packages installed in system profile. To search by name, run: + # $ nix-env -qaP | grep wget + # environment.systemPackages = with pkgs; [ + # wget + # ]; + + # List services that you want to enable: + + # Enable the OpenSSH daemon. + services.openssh.enable = true; + services.openssh.permitRootLogin = "yes"; + + # Enable CUPS to print documents. + services.printing.enable = false; + + # Enable the X11 windowing system. + services.xserver.enable = false; + # services.xserver.layout = "us"; + # services.xserver.xkbOptions = "eurosign:e"; + + # Enable the KDE Desktop Environment. + # services.xserver.displayManager.kdm.enable = true; + # services.xserver.desktopManager.kde4.enable = true; + + # Define a user account. Don't forget to set a password with ‘passwd’. + # users.extraUsers.guest = { + # isNormalUser = true; + # uid = 1000; + # }; + + # The NixOS release to be compatible with for stateful data such as databases. + system.stateVersion = "16.03"; + +} diff --git a/ops/nano/hardware-configuration.nix b/ops/nano/hardware-configuration.nix new file mode 100644 index 0000000..501306c --- /dev/null +++ b/ops/nano/hardware-configuration.nix @@ -0,0 +1,23 @@ +# Do not modify this file! It was generated by ‘nixos-generate-config’ +# and may be overwritten by future invocations. Please make changes +# to /etc/nixos/configuration.nix instead. +{ config, lib, pkgs, ... }: + +{ + imports = + [ + ]; + + boot.initrd.availableKernelModules = [ "xhci_pci" "ehci_pci" "ahci" "usb_storage" "usbhid" "sd_mod" ]; + boot.kernelModules = [ "kvm-intel" ]; + boot.extraModulePackages = [ ]; + + fileSystems."/" = + { device = "/dev/disk/by-uuid/e02a410e-5044-440f-90e9-b573e51f1315"; + fsType = "ext4"; + }; + + swapDevices = [ ]; + + nix.maxJobs = 2; +} diff --git a/ops/nanos@kn.nix b/ops/nanos@kn.nix new file mode 100644 index 0000000..d2003da --- /dev/null +++ b/ops/nanos@kn.nix @@ -0,0 +1,26 @@ +{ nixpkgs ? import {} +, nrNanos ? 1 # Number of nanos +}: + +let + pkgs = nixpkgs; + webserver = { services.httpd.enable = true; + services.httpd.adminAddr = "mail@stefanjunker.de"; + services.httpd.documentRoot = "${pkgs.nixops}/share/doc/nixops/"; + networking.firewall.allowedTCPPorts = [ 80 ]; + }; + + mkNano = { n }: { + imports = [ + (import ./nano/configuration.nix {inherit pkgs n;}) + ../configuration/common/user/root.nix + ]; + deployment.targetEnv = "none"; + deployment.targetHost = "nano${toString n}"; + }; + + mkNanos = n: nixpkgs.lib.nameValuePair "nano${toString n}" ( + mkNano { inherit n; } + ); + +in nixpkgs.lib.listToAttrs (map mkNanos (nixpkgs.lib.range 0 (nrNanos - 1)))